Titre :	CMOS : circuit design, layout, and simulation
Type de document :	texte imprimé
Auteurs :	R. Jacob Baker, Auteur
Mention d'édition :	3 rd. ed.
Editeur :	Hoboken,New jersey : John Wiley & Sons, Inc
Année de publication :	2010
Collection :	IEEE Press Series on Microelectronic Systems
Importance :	1173 p.
Présentation :	couv. ill. en en coul
Format :	23,7 cm.
ISBN/ISSN/EAN :	978-0-470-88132-3
Langues :	Anglais (eng)
Index. décimale :	27-05 Microélectronique
Résumé :	The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples
Note de contenu :	Contents Chapter 1 Introduction to CMOS Design 1.1 The CMOS IC Design Process 1.2 CMOS Background 1.3 An Introduction to SPICE CHAPTER 2 The Well 2.1 Patterning 2.2 Laying Out the N-well 2.3 Resistance Calculation 2.4 The N-well/Substrate Diode 2.5 The RC Delay through an N-well 2.6 Twin Well Processes CHAPTER 3 The Metal Layers 3.1 The Bonding Pad 3.2 Design and Layout Using the Metal Layers 3.3 Crosstalk and Ground Bounce 3.4 Layout Examples CHAPTER 4 The Active and Poly Layers 4.1 Layout using the Active and Poly Layers 4.2 Connecting Wires to Poly and Active 4.3 Electrostatic Discharge (ESD) Protection CHAPTER 5 Resistors, Capacitors, MOSFETs 5.1 Resistors 5.2 Capacitors 5.3 MOSFETs 5.4 Layout Examples CHAPTER 6 MOSFET Operation 6.1 MOSFET Capacitance Overview/Review 6.2 The Threshold Voltage 6.3 IV Characteristics of MOSFETs 6.4 SPICE Modeling of the MOSFET 6.5 Short-Channel MOSFETs CHAPTER 7 CMOS Fabrication 7.1 CMOS Unit Processes 7.2 CMOS Process Integration 7.3 Backend Processes Chapter 8 Electrical Noise: An Overview 8.1 Signals 8.2 Circuit Noise 8.3 Discussion CHAPTER 9 Models for Analog Design 9.1 Long-Channel MOSFETs 9.2 Short-Channel MOSFETs 9.3 MOSFET Noise Modeling CHAPTER 10 Models for Digital Design 10.1 The Digital MOSFET Model 10.2 The MOSFET Pass Gate 10.3 A Final Comment Concerning Measurements CHAPTER 11 The Inverter 11.1 DC Characteristics 11.2 Switching Characteristics 11.3 Layout of the Inverter 11.4 Sizing for Large Capacitive Loads 11.5 Other Inverter Configurations CHAPTER 12 Static Logic Gates 12.1 DC Characteristics of the NAND and NOR Gates 12.2 Layout of the NAND and NOR Gates 12.3 Switching Characteristics 12.4 Complex CMOS Logic Gates CHAPTER 13 Clocked Circuits 13.1 The CMOS TG 13.2 Applications of the Transmission Gate 13.3 Latches and Flip-Flops CHAPTER 14 Dynamic Logic Gates 14.1 Fundamentals of Dynamic Logic 14.2 Clocked CMOS Logic CHAPTER 15 VLSI Layout Examples 15.1 Chip Layout 15.2 Layout Steps by Dean Moriarty CHAPTER 16 Memory Circuits 16.1 Array Architectures 16.2 Peripheral Circuits 16.3 Memory Cells CHAPTER 17 Sensing Using ΔΣ Modulation 17.1 Qualitative Discussion 17.2 Sensing Resistive Memory 17.3 Sensing in CMOS Imagers CHAPTER 18 Special Purpose CMOS Circuits 18.1 The Schmitt Trigger 18.2 Multivibrator Circuits 18.3 Input Buffers 18.4 Charge Pumps (Voltage Generators) CHAPTER 19 Digital Phase-Locked Loops 19.1 The Phase Detector 19.2 The Voltage-Controlled Oscillator 19.3 The Loop Filter 19.4 System Concerns 19.5 Delay-Locked Loops 19.6 Some Examples CHAPTER 20 Current Mirrors 20.1 The Basic Current Mirror 20.2 Cascoding the Current Mirror 20.3 Biasing Circuits CHAPTER 21 Amplifiers 21.1 Gate-Drain-Connected Loads 21.2 Current Source Loads 21.3 The Push-Pull Amplifier CHAPTER 22 Differential Amplifiers 22.1 The Source-Coupled Pair 22.2 The Source Cross-Coupled Pair 22.3 Cascode Loads (The Telescopic Diff-Amp) 22.4 Wide-Swing Differential Amplifiers CHAPTER 23 Voltage References 23.1 MOSFET-Resistor Voltage References 23.2 Parasitic Diode-Based References CHAPTER 24 Operational Amplifiers I 24.1 The Two-Stage Op-Amp 24.2 An Op-Amp with Output Buffer 24.3 The Operational Transconductance Amplifier (OTA) 24.4 Gain-Enhancement 24.5 Some Examples and Discussions CHAPTER 25 Dynamic Analog Circuits 25.1 The MOSFET Switch 25.2 Fully-Differential Circuits 25.3 Switched-Capacitor Circuits 25.4 Circuits CHAPTER 26 Operational Amplifiers II 26.1 Biasing for Power and Speed 26.2 Basic Concepts 26.3 Basic Op-Amp Design 26.4 Op-Amp Design Using Switched-Capacitor CMFB CHAPTER 27 Nonlinear Analog Circuits 27.1 Basic CMOS Comparator Design 27.2 Adaptive Biasing 27.3 Analog Multipliers CHAPTER 28 Data Converter Fundamentals 28.1 Analog Versus Discrete Time Signals 28.2 Converting Analog Signals to Digital Signals 28.3 Sample-and-Hold (S/H) Characteristics 28.4 Digital-to-Analog Converter (DAC) Specifications 28.5 Analog-to-Digital Converter (ADC) Specifications 28.6 Mixed-Signal Layout Issues CHAPTER 29 Data Converter Architectures 29.1 DAC Architectures 29.2 ADC Architectures CHAPTER 30 Implementing Data Converters 30.1 R−2R Topologies for DACs 30.2 Op-Amps in Data Converters 30.3 Implementing ADCs CHAPTER 31 Feedback Amplifiers 31.1 The Feedback Equation 31.2 Properties of Negative Feedback on Amplifier Design 31.3 Recognizing Feedback Topologies 31.4 The Voltage Amp (Series-Shunt Feedback) 31.5 The Transimpedance Amp (Shunt-Shunt Feedback) 31.6 The Transconductance Amp (Series-Series Feedback) 31.7 The Current Amplifier (Shunt-Series Feedback) 31.8 Stability 31.9 Design Examples Index

CMOS : circuit design, layout, and simulation [texte imprimé] / R. Jacob Baker, Auteur  . -  3 rd. ed. . - Hoboken,New jersey : John Wiley & Sons, Inc, 2010 . - 1173 p. : couv. ill. en en coul ; 23,7 cm.. - (IEEE Press Series on Microelectronic Systems) .
ISBN : 978-0-470-88132-3
Langues : Anglais (eng)

Index. décimale :	27-05 Microélectronique
Résumé :	The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples
Note de contenu :	Contents Chapter 1 Introduction to CMOS Design 1.1 The CMOS IC Design Process 1.2 CMOS Background 1.3 An Introduction to SPICE CHAPTER 2 The Well 2.1 Patterning 2.2 Laying Out the N-well 2.3 Resistance Calculation 2.4 The N-well/Substrate Diode 2.5 The RC Delay through an N-well 2.6 Twin Well Processes CHAPTER 3 The Metal Layers 3.1 The Bonding Pad 3.2 Design and Layout Using the Metal Layers 3.3 Crosstalk and Ground Bounce 3.4 Layout Examples CHAPTER 4 The Active and Poly Layers 4.1 Layout using the Active and Poly Layers 4.2 Connecting Wires to Poly and Active 4.3 Electrostatic Discharge (ESD) Protection CHAPTER 5 Resistors, Capacitors, MOSFETs 5.1 Resistors 5.2 Capacitors 5.3 MOSFETs 5.4 Layout Examples CHAPTER 6 MOSFET Operation 6.1 MOSFET Capacitance Overview/Review 6.2 The Threshold Voltage 6.3 IV Characteristics of MOSFETs 6.4 SPICE Modeling of the MOSFET 6.5 Short-Channel MOSFETs CHAPTER 7 CMOS Fabrication 7.1 CMOS Unit Processes 7.2 CMOS Process Integration 7.3 Backend Processes Chapter 8 Electrical Noise: An Overview 8.1 Signals 8.2 Circuit Noise 8.3 Discussion CHAPTER 9 Models for Analog Design 9.1 Long-Channel MOSFETs 9.2 Short-Channel MOSFETs 9.3 MOSFET Noise Modeling CHAPTER 10 Models for Digital Design 10.1 The Digital MOSFET Model 10.2 The MOSFET Pass Gate 10.3 A Final Comment Concerning Measurements CHAPTER 11 The Inverter 11.1 DC Characteristics 11.2 Switching Characteristics 11.3 Layout of the Inverter 11.4 Sizing for Large Capacitive Loads 11.5 Other Inverter Configurations CHAPTER 12 Static Logic Gates 12.1 DC Characteristics of the NAND and NOR Gates 12.2 Layout of the NAND and NOR Gates 12.3 Switching Characteristics 12.4 Complex CMOS Logic Gates CHAPTER 13 Clocked Circuits 13.1 The CMOS TG 13.2 Applications of the Transmission Gate 13.3 Latches and Flip-Flops CHAPTER 14 Dynamic Logic Gates 14.1 Fundamentals of Dynamic Logic 14.2 Clocked CMOS Logic CHAPTER 15 VLSI Layout Examples 15.1 Chip Layout 15.2 Layout Steps by Dean Moriarty CHAPTER 16 Memory Circuits 16.1 Array Architectures 16.2 Peripheral Circuits 16.3 Memory Cells CHAPTER 17 Sensing Using ΔΣ Modulation 17.1 Qualitative Discussion 17.2 Sensing Resistive Memory 17.3 Sensing in CMOS Imagers CHAPTER 18 Special Purpose CMOS Circuits 18.1 The Schmitt Trigger 18.2 Multivibrator Circuits 18.3 Input Buffers 18.4 Charge Pumps (Voltage Generators) CHAPTER 19 Digital Phase-Locked Loops 19.1 The Phase Detector 19.2 The Voltage-Controlled Oscillator 19.3 The Loop Filter 19.4 System Concerns 19.5 Delay-Locked Loops 19.6 Some Examples CHAPTER 20 Current Mirrors 20.1 The Basic Current Mirror 20.2 Cascoding the Current Mirror 20.3 Biasing Circuits CHAPTER 21 Amplifiers 21.1 Gate-Drain-Connected Loads 21.2 Current Source Loads 21.3 The Push-Pull Amplifier CHAPTER 22 Differential Amplifiers 22.1 The Source-Coupled Pair 22.2 The Source Cross-Coupled Pair 22.3 Cascode Loads (The Telescopic Diff-Amp) 22.4 Wide-Swing Differential Amplifiers CHAPTER 23 Voltage References 23.1 MOSFET-Resistor Voltage References 23.2 Parasitic Diode-Based References CHAPTER 24 Operational Amplifiers I 24.1 The Two-Stage Op-Amp 24.2 An Op-Amp with Output Buffer 24.3 The Operational Transconductance Amplifier (OTA) 24.4 Gain-Enhancement 24.5 Some Examples and Discussions CHAPTER 25 Dynamic Analog Circuits 25.1 The MOSFET Switch 25.2 Fully-Differential Circuits 25.3 Switched-Capacitor Circuits 25.4 Circuits CHAPTER 26 Operational Amplifiers II 26.1 Biasing for Power and Speed 26.2 Basic Concepts 26.3 Basic Op-Amp Design 26.4 Op-Amp Design Using Switched-Capacitor CMFB CHAPTER 27 Nonlinear Analog Circuits 27.1 Basic CMOS Comparator Design 27.2 Adaptive Biasing 27.3 Analog Multipliers CHAPTER 28 Data Converter Fundamentals 28.1 Analog Versus Discrete Time Signals 28.2 Converting Analog Signals to Digital Signals 28.3 Sample-and-Hold (S/H) Characteristics 28.4 Digital-to-Analog Converter (DAC) Specifications 28.5 Analog-to-Digital Converter (ADC) Specifications 28.6 Mixed-Signal Layout Issues CHAPTER 29 Data Converter Architectures 29.1 DAC Architectures 29.2 ADC Architectures CHAPTER 30 Implementing Data Converters 30.1 R−2R Topologies for DACs 30.2 Op-Amps in Data Converters 30.3 Implementing ADCs CHAPTER 31 Feedback Amplifiers 31.1 The Feedback Equation 31.2 Properties of Negative Feedback on Amplifier Design 31.3 Recognizing Feedback Topologies 31.4 The Voltage Amp (Series-Shunt Feedback) 31.5 The Transimpedance Amp (Shunt-Shunt Feedback) 31.6 The Transconductance Amp (Series-Series Feedback) 31.7 The Current Amplifier (Shunt-Series Feedback) 31.8 Stability 31.9 Design Examples Index