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Fundamentals of Applied Electromagnetics / Fawwaz T. Ulaby

Public ISBD Titre : Fundamentals of Applied Electromagnetics Type de document : texte imprimé Auteurs : Fawwaz T. Ulaby, Auteur ; Eric Michielssen, Auteur ; Umberto Ravaioli, Auteur Mention d'édition : 6 th. ed. Editeur : Upper Saddle River, New Jersey : Pearson Education Année de publication : 2010 Importance : 512 p. Présentation : couv. ill.,ill. Format : 24,1 cm. ISBN/ISSN/EAN : 978-0-13-255008-6 Langues : Anglais (eng) Catégories : TELECOMMUNICATION Index. décimale : 28-01 Théorie des champs électromagnétiques Résumé : Transmission lines constitute a natural bridge between electric circuits and electromagnetics. By introducing transmission lines early, Ulaby allows the student to use familiar concepts to learn about many of the properties of wave propagation in a guided structure. Technology Briefs connect a basic concept, such as capacitance, inductance, or polarization, to real-world applications. The interactive CD-ROM accompanying the text can be used in conjunction with the material in the textbook for self-study. The multiple-window features of electronic displays make it possible to design interactive modules with 'help' buttons to guide the student through the solution of a problem when needed. Video animations can show how fields and waves propagate in time and space, how the beam of an antenna array can be made to scan electronically, and examples of how current is induced in a circuit under the influence of a changing magnetic field. Emphasis is placed on using the mathematics to explain and clarify the physics, followed by practical examples intended to demonstrate the engineering relevance of physical concepts New to this Edition A set of 42 CD-interactive simulation modules that allow the user to interactively analyze and design transmission line circuits; generate spatial patterns of the electric and magnetic fields induced by charges and currents; visualize in 2-D and 3-D space how the gradient, divergence, and curl operate on spatial functions; observe the temporal and spatial waveforms of plane waves propagating in lossless and lossy media; calculate and display field distributions inside a rectangular waveguide; and generate radiation patterns for linear antennas and parabolic dishes. The CD modules are now available on-line at http://em.eecs.umich.edu/. New/updated Technology Briefs establish additional bridges between electromagnetic fundamentals and their countless engineering and scientific applications. Full-color figures and images now more efficiently convey core concepts. New/updated end-of-chapter problems provide more opportunities for review. Updated bibliography features current references. Note de contenu : Table of Contents Chapter 1 Introduction: Waves and Phasors 1-1 Historical Timeline 1-2 Dimensions, Units, and Notation 1-3 The Nature of Electromagnetism 1-4 Traveling Waves 1-5 The Electromagnetic Spectrum 1-6 Review of Complex Numbers 1-7 Review of Phasors Chapter 2 Transmission Lines 2-1 General Considerations 2-2 Lumped-Element Model 2-3 Transmission-Line Equations 2-4 Wave Propagation on a Transmission Line 2-5 The Lossless Microstrip Line 2-6 The Lossless Transmission Line: General Considerations 2-7 Wave Impedance of the Lossless Line TB3 Microwave Ovens 2-8 Special Cases of the Lossless Line 2-9 Power Flow on a Lossless Transmission Line 2-10 The Smith Chart 2-11 Impedance Matching 2-12 Transients on Transmission Lines Chapter 3 Vector Analysis 3-1 Basic Laws of Vector Algebra 3-2 Orthogonal Coordinate Systems 3-3 Transformations between Coordinate Systems 3-4 Gradient of a Scalar Field 3-5 Divergence of a Vector Field TB6 X-Ray Computed Tomography 3-6 Curl of a Vector Field 3-7 Laplacian Operator Chapter 4 Electrostatics 4-1 Maxwell’s Equations 4-2 Charge and Current Distributions 4-3 Coulomb’s Law 4-4 Gauss’s Law 4-5 Electric Scalar Potential 4-6 Conductors 4-7 Dielectrics 4-8 Electric Boundary Conditions 4-9 Capacitance 4-10 Electrostatic Potential Energy TB8 Supercapacitors as Batteries 4-11 Image Method TB9 Capacitive Sensors Chapter 5 Magnetostatics 5-1 Magnetic Forces and Torques 5-2 The Biot—Savart Law 5-3 Maxwell’s Magnetostatic Equations 5-4 Vector Magnetic Potential 5-5 Magnetic Properties of Materials 5-6 Magnetic Boundary Conditions 5-7 Inductance 5-8 Magnetic Energy Chapter 6 Maxwell’s Equations for Time-Varying Fields 6-1 Faraday’s Law 6-2 Stationary Loop in a Time-Varying Magnetic Field 6-3 The Ideal Transformer 6-4 Moving Conductor in a Static Magnetic Field 6-5 The Electromagnetic Generator 6-6 Moving Conductor in a Time-Varying Magnetic Field TB12 EMF Sensors 6-7 Displacement Current Chapter 7 Plane-Wave Propagation 7-1 Time-Harmonic Fields 7-2 Plane-Wave Propagation in Lossless Media 7-3 Wave Polarization 7-4 Plane-Wave Propagation in Lossy Media 7-5 Current Flow in a Good Conductor 7-6 Electromagnetic Power Density Chapter 8 Wave Reflection and Transmission 8-1 Wave Reflection and Transmission at Normal Incidence 8-2 Snell’s Laws 8-3 Fiber Optics 8-4 Wave Reflection and Transmission at Oblique Incidence 8-5 Reflectivity and Transmissivity TB16 Bar-Code Readers 8-6 Waveguides 8-7 General Relations for E and H 8-8 TM Modes in Rectangular Waveguide 8-9 TE Modes in Rectangular Waveguide 8-10 Propagation Velocities 8-11 Cavity Resonators Chapter 9 Radiation and Antennas 9-1 The Hertzian Dipole 9-2 Antenna Radiation Characteristics 9-3 Half-Wave Dipole Antenna 9-4 Dipole of Arbitrary Length 9-5 Effective Area of a Receiving Antenna 9-6 Friis Transmission Formula 9-7 Radiation by Large-Aperture Antennas 9-8 Rectangular Aperture with Uniform Aperture Distribution 9-11 Electronic Scanning of Arrays Chapter 10 Satellite Communication Systems and Radar Sensors 10-1 Satellite Communication Systems 10-2 Satellite Transponders 10-3 Communication-Link Power Budget 10-4 Antenna Beams 10-5 Radar Sensors 10-6 Target Detection 10-7 Doppler Radar 10-8 Monopulse Radar -Appendix -Index Fundamentals of Applied Electromagnetics [texte imprimé] / Fawwaz T. Ulaby, Auteur ; Eric Michielssen, Auteur ; Umberto Ravaioli, Auteur  . -  6 th. ed. . - Upper Saddle River, New Jersey : Pearson Education, 2010 . - 512 p. : couv. ill.,ill. ; 24,1 cm. ISBN : 978-0-13-255008-6 Langues : Anglais (eng) Catégories : TELECOMMUNICATION Index. décimale : 28-01 Théorie des champs électromagnétiques Résumé : Transmission lines constitute a natural bridge between electric circuits and electromagnetics. By introducing transmission lines early, Ulaby allows the student to use familiar concepts to learn about many of the properties of wave propagation in a guided structure. Technology Briefs connect a basic concept, such as capacitance, inductance, or polarization, to real-world applications. The interactive CD-ROM accompanying the text can be used in conjunction with the material in the textbook for self-study. The multiple-window features of electronic displays make it possible to design interactive modules with 'help' buttons to guide the student through the solution of a problem when needed. Video animations can show how fields and waves propagate in time and space, how the beam of an antenna array can be made to scan electronically, and examples of how current is induced in a circuit under the influence of a changing magnetic field. Emphasis is placed on using the mathematics to explain and clarify the physics, followed by practical examples intended to demonstrate the engineering relevance of physical concepts New to this Edition A set of 42 CD-interactive simulation modules that allow the user to interactively analyze and design transmission line circuits; generate spatial patterns of the electric and magnetic fields induced by charges and currents; visualize in 2-D and 3-D space how the gradient, divergence, and curl operate on spatial functions; observe the temporal and spatial waveforms of plane waves propagating in lossless and lossy media; calculate and display field distributions inside a rectangular waveguide; and generate radiation patterns for linear antennas and parabolic dishes. The CD modules are now available on-line at http://em.eecs.umich.edu/. New/updated Technology Briefs establish additional bridges between electromagnetic fundamentals and their countless engineering and scientific applications. Full-color figures and images now more efficiently convey core concepts. New/updated end-of-chapter problems provide more opportunities for review. Updated bibliography features current references. Note de contenu : Table of Contents Chapter 1 Introduction: Waves and Phasors 1-1 Historical Timeline 1-2 Dimensions, Units, and Notation 1-3 The Nature of Electromagnetism 1-4 Traveling Waves 1-5 The Electromagnetic Spectrum 1-6 Review of Complex Numbers 1-7 Review of Phasors Chapter 2 Transmission Lines 2-1 General Considerations 2-2 Lumped-Element Model 2-3 Transmission-Line Equations 2-4 Wave Propagation on a Transmission Line 2-5 The Lossless Microstrip Line 2-6 The Lossless Transmission Line: General Considerations 2-7 Wave Impedance of the Lossless Line TB3 Microwave Ovens 2-8 Special Cases of the Lossless Line 2-9 Power Flow on a Lossless Transmission Line 2-10 The Smith Chart 2-11 Impedance Matching 2-12 Transients on Transmission Lines Chapter 3 Vector Analysis 3-1 Basic Laws of Vector Algebra 3-2 Orthogonal Coordinate Systems 3-3 Transformations between Coordinate Systems 3-4 Gradient of a Scalar Field 3-5 Divergence of a Vector Field TB6 X-Ray Computed Tomography 3-6 Curl of a Vector Field 3-7 Laplacian Operator Chapter 4 Electrostatics 4-1 Maxwell’s Equations 4-2 Charge and Current Distributions 4-3 Coulomb’s Law 4-4 Gauss’s Law 4-5 Electric Scalar Potential 4-6 Conductors 4-7 Dielectrics 4-8 Electric Boundary Conditions 4-9 Capacitance 4-10 Electrostatic Potential Energy TB8 Supercapacitors as Batteries 4-11 Image Method TB9 Capacitive Sensors Chapter 5 Magnetostatics 5-1 Magnetic Forces and Torques 5-2 The Biot—Savart Law 5-3 Maxwell’s Magnetostatic Equations 5-4 Vector Magnetic Potential 5-5 Magnetic Properties of Materials 5-6 Magnetic Boundary Conditions 5-7 Inductance 5-8 Magnetic Energy Chapter 6 Maxwell’s Equations for Time-Varying Fields 6-1 Faraday’s Law 6-2 Stationary Loop in a Time-Varying Magnetic Field 6-3 The Ideal Transformer 6-4 Moving Conductor in a Static Magnetic Field 6-5 The Electromagnetic Generator 6-6 Moving Conductor in a Time-Varying Magnetic Field TB12 EMF Sensors 6-7 Displacement Current Chapter 7 Plane-Wave Propagation 7-1 Time-Harmonic Fields 7-2 Plane-Wave Propagation in Lossless Media 7-3 Wave Polarization 7-4 Plane-Wave Propagation in Lossy Media 7-5 Current Flow in a Good Conductor 7-6 Electromagnetic Power Density Chapter 8 Wave Reflection and Transmission 8-1 Wave Reflection and Transmission at Normal Incidence 8-2 Snell’s Laws 8-3 Fiber Optics 8-4 Wave Reflection and Transmission at Oblique Incidence 8-5 Reflectivity and Transmissivity TB16 Bar-Code Readers 8-6 Waveguides 8-7 General Relations for E and H 8-8 TM Modes in Rectangular Waveguide 8-9 TE Modes in Rectangular Waveguide 8-10 Propagation Velocities 8-11 Cavity Resonators Chapter 9 Radiation and Antennas 9-1 The Hertzian Dipole 9-2 Antenna Radiation Characteristics 9-3 Half-Wave Dipole Antenna 9-4 Dipole of Arbitrary Length 9-5 Effective Area of a Receiving Antenna 9-6 Friis Transmission Formula 9-7 Radiation by Large-Aperture Antennas 9-8 Rectangular Aperture with Uniform Aperture Distribution 9-11 Electronic Scanning of Arrays Chapter 10 Satellite Communication Systems and Radar Sensors 10-1 Satellite Communication Systems 10-2 Satellite Transponders 10-3 Communication-Link Power Budget 10-4 Antenna Beams 10-5 Radar Sensors 10-6 Target Detection 10-7 Doppler Radar 10-8 Monopulse Radar -Appendix -Index

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2676	28-02-08	Livre	Bibliothèque de Génie Electrique- USTO	Documentaires	Exclu du prêt	2676

VHDL for engineers / Kenneth L. Short

Public ISBD Titre : VHDL for engineers Type de document : texte imprimé Auteurs : Kenneth L. Short, Auteur Editeur : Upper Saddle River, New Jersey : Pearson Education Année de publication : 2009 Importance : 685 p. Présentation : couv. ill. en en coul Format : 24 cm. Accompagnement : CD-ROM ISBN/ISSN/EAN : 978-0-13-142478-4 Langues : Anglais (eng) Catégories : MICRO INFORMATIQUE Index. décimale : 24-03 Programmation des microsystèmes et microprocesseurs Résumé : VHDL for Engineers teaches readers how to design and simulate digital systems using the hardware description language, VHDL. These systems are designed for implementation using programmable logic devices (PLDs) such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs). The book focuses on writing VHDL design descriptions and VHDL testbenches. The steps in VHDL/PLD design methodology are also a key focus. Short presents the complex VHDL language in a logical manner, introducing concepts in an order that allows the readers to begin producing synthesizable designs as soon as possible. Note de contenu : Contents 1 Digital Design Using VHDL and PLDs 1.1 VHDL/PLD Design Methodology 1.2 Requirements Analysis and Specification 1.3 VHDL Design Description 1.4 Verification Using Simulation 1.5 Testbenches 1.6 Functional (Behavioral) Simulation 1.7 Programmable Logic Devices (PLDs) 1.8 SPLDs and the 22V10 1.9 Logic Synthesis for the Target PLD 1.10 Place-and-Route and Timing Simulation 1.11 Programming and Verifying a Target PLD 1.12 VHDL/PLD Design Methodology Advantages 1.13 VHDL’s Development 1.14 VHDL for Synthesis versus VHDL for Simulation 1.15 This Book’s Primary Objective 2 Entities, Architectures, and Coding Styles 2.1 Design Units, Library Units, and Design Entities 2.2 Entity Declaration 2.3 VHDL Syntax Definitions 2.4 Port Modes 2.5 Architecture Body 2.6 Coding Styles 2.7 Synthesis Results versus Coding Style 2.8 Levels of Abstraction and Synthesis 2.9 Design Hierarchy and Structural Style 3 Signals and Data Types 3.1 Object Classes and Object Types 3.2 Signal Objects 3.3 Scalar Types 3.4 Type Std_Logic 3.5 Scalar Literals and Scalar Constants 3.6 Composite Types 3.7 Arrays 3.8 Types Unsigned and Signed 3.9 Composite Literals and Composite Constants 3.10 Integer Types 3.11 Port Types for Synthesis 3.12 Operators and Expressions 4 Dataflow Style Combinational Design 4.1 Logical Operators 4.2 Signal Assignments in Dataflow Style Architectures 4.3 Selected Signal Assignment 4.4 Type Boolean and the Relational Operators 4.5 Conditional Signal Assignment 4.6 Priority Encoders 4.7 Don’t Care Inputs and Outputs 4.8 Decoders 4.9 Table Lookup 4.10 Three-state Buffers 4.11 Avoiding Combinational Loops 5 Behavioral Style Combinational Design 5.1 Behavioral Style Architecture 5.2 Process Statement 5.3 Sequential Statements 5.4 Case Statement 5.5 If Statement 5.6 Loop Statement 5.7 Variables 5.8 Parity Detector Example 5.9 Synthesis of Processes Describing Combinational Systems 6 Event-Driven Simulation 6.1 Simulator Approaches 6.2 Elaboration 6.3 Signal Drivers 6.4 Simulator Kernel Process 6.5 Simulation Initialization 6.6 Simulation Cycles 6.7 Signals versus Variables 6.8 Delta Delays 6.9 Delta Delays and Combinational Feedback 6.10 Multiple Drivers 6.11 Signal Attributes 7 Testbenches for Combinational Designs 7.1 Design Verification 7.2 Functional Verification of Combinational Designs 7.3 A Simple Testbench 7.4 Physical Types 7.5 Single Process Testbench 7.6 Wait Statements 7.7 Assertion and Report Statements 7.8 Records and Table Lookup Testbenches 7.9 Testbenches That Compute Stimulus and Expected Results 7.10 Predefined Shift Operators 7.11 Stimulus Order Based on UUT Functionality 7.12 Comparing a UUT to a Behavioral Intent Model 7.13 Code Coverage and Branch Coverage 7.14 Post-Synthesis and Timing Verifications for Combinational Designs 7.15 Timing Models Using VITAL and SDF 8 Latches and Flip-flops 8.1 Sequential Systems and Their Memory Elements 8.2 D Latch 8.3 Detecting Clock Edges 8.4 D Flip-flops 8.5 Enabled (Gated) Flip-flop 8.6 Other Flip-flop Types 8.7 PLD Primitive Memory Elements 8.8 Timing Requirements and Synchronous Input Data 9 Multibit Latches, Registers, Counters, and Memory 9.1 Multibit Latches and Registers 9.2 Shift Registers 9.3 Shift Register Counters 9.4 Counters 9.5 Detecting Non-clock Signal Edges 9.6 Microprocessor Compatible Pulse Width Modulated Signal Generator 9.7 Memories 10 Finite State Machines 10.1 Finite State Machines 10.2 FSM State Diagrams 10.3 Three Process FSM VHDL Template 10.4 State Diagram Development 10.5 Decoder for an Optical Shaft Encoder 10.6 State Encoding and State Assignment 10.7 Supposedly Safe FSMs 10.8 Inhibit Logic FSM Example 10.9 Counters as Moore FSMs 11 ASM Charts and RTL Design 11.1 Algorithmic State Machine Charts 11.2 Converting ASM Charts to VHDL 11.3 System Architecture 11.4 Successive Approximation Register Design Example 11.5 Sequential Multiplier Design 12 Subprograms 12.1 Subprograms 12.2 Functions 12.3 Procedures 12.4 Array Attributes and Unconstrained Arrays 12.5 Overloading Subprograms and Operators 12.6 Type Conversions 13 Packages 13.1 Packages and Package Bodies 13.2 Standard and De Facto Standard Packages 13.3 Package STD_LOGIC_1164 13.4 Package NUMERIC_STD (IEEE Std 1076.3) 13.5 Package STD_LOGIC_ARITH 13.6 Packages for VHDL Text Output 14 Testbenches for Sequential Systems 14.1 Simple Sequential Testbenches 14.2 Generating a System Clock 14.3 Generating the System Reset 14.4 Synchronizing Stimulus Generation and Monitoring 14.5 Testbench for Successive Approximation Register 14.6 Determining a Testbench Stimulus for a Sequential System 14.7 Using Procedures for Stimulus Generation 14.8 Output Verification in Stimulus Procedures 14.9 Bus Functional Models 14.10 Response Monitors 15 Modular Design and Hierarchy 15.1 Modular Design, Partitioning, and Hierarchy 15.2 Design Units and Library Units 15.3 Design Libraries 15.4 Using Library Units 15.5 Direct Design Entity Instantiation 15.6 Components and Indirect Design Entity Instantiation 15.7 Configuration Declarations 15.8 Component Connections 15.9 Parameterized Design Entities 15.10 Library of Parameterized Modules (LPM) 15.11 Generate Statement 16 More Design Examples 16.1 Microprocessor-Compatible Quadrature Decoder/Counter Design 16.2 Verification of Quadrature Decoder/Counter 16.3 Parameterized Quadrature Decoder/Counter 16.4 Electronic Safe Design 16.5 Verification of Electronic Safe 16.6 Encoder for RF Transmitter Design Appendix VHDL Attribute Bibliography Index VHDL for engineers [texte imprimé] / Kenneth L. Short, Auteur . - Upper Saddle River, New Jersey : Pearson Education, 2009 . - 685 p. : couv. ill. en en coul ; 24 cm. + CD-ROM. ISBN : 978-0-13-142478-4 Langues : Anglais (eng) Catégories : MICRO INFORMATIQUE Index. décimale : 24-03 Programmation des microsystèmes et microprocesseurs Résumé : VHDL for Engineers teaches readers how to design and simulate digital systems using the hardware description language, VHDL. These systems are designed for implementation using programmable logic devices (PLDs) such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs). The book focuses on writing VHDL design descriptions and VHDL testbenches. The steps in VHDL/PLD design methodology are also a key focus. Short presents the complex VHDL language in a logical manner, introducing concepts in an order that allows the readers to begin producing synthesizable designs as soon as possible. Note de contenu : Contents 1 Digital Design Using VHDL and PLDs 1.1 VHDL/PLD Design Methodology 1.2 Requirements Analysis and Specification 1.3 VHDL Design Description 1.4 Verification Using Simulation 1.5 Testbenches 1.6 Functional (Behavioral) Simulation 1.7 Programmable Logic Devices (PLDs) 1.8 SPLDs and the 22V10 1.9 Logic Synthesis for the Target PLD 1.10 Place-and-Route and Timing Simulation 1.11 Programming and Verifying a Target PLD 1.12 VHDL/PLD Design Methodology Advantages 1.13 VHDL’s Development 1.14 VHDL for Synthesis versus VHDL for Simulation 1.15 This Book’s Primary Objective 2 Entities, Architectures, and Coding Styles 2.1 Design Units, Library Units, and Design Entities 2.2 Entity Declaration 2.3 VHDL Syntax Definitions 2.4 Port Modes 2.5 Architecture Body 2.6 Coding Styles 2.7 Synthesis Results versus Coding Style 2.8 Levels of Abstraction and Synthesis 2.9 Design Hierarchy and Structural Style 3 Signals and Data Types 3.1 Object Classes and Object Types 3.2 Signal Objects 3.3 Scalar Types 3.4 Type Std_Logic 3.5 Scalar Literals and Scalar Constants 3.6 Composite Types 3.7 Arrays 3.8 Types Unsigned and Signed 3.9 Composite Literals and Composite Constants 3.10 Integer Types 3.11 Port Types for Synthesis 3.12 Operators and Expressions 4 Dataflow Style Combinational Design 4.1 Logical Operators 4.2 Signal Assignments in Dataflow Style Architectures 4.3 Selected Signal Assignment 4.4 Type Boolean and the Relational Operators 4.5 Conditional Signal Assignment 4.6 Priority Encoders 4.7 Don’t Care Inputs and Outputs 4.8 Decoders 4.9 Table Lookup 4.10 Three-state Buffers 4.11 Avoiding Combinational Loops 5 Behavioral Style Combinational Design 5.1 Behavioral Style Architecture 5.2 Process Statement 5.3 Sequential Statements 5.4 Case Statement 5.5 If Statement 5.6 Loop Statement 5.7 Variables 5.8 Parity Detector Example 5.9 Synthesis of Processes Describing Combinational Systems 6 Event-Driven Simulation 6.1 Simulator Approaches 6.2 Elaboration 6.3 Signal Drivers 6.4 Simulator Kernel Process 6.5 Simulation Initialization 6.6 Simulation Cycles 6.7 Signals versus Variables 6.8 Delta Delays 6.9 Delta Delays and Combinational Feedback 6.10 Multiple Drivers 6.11 Signal Attributes 7 Testbenches for Combinational Designs 7.1 Design Verification 7.2 Functional Verification of Combinational Designs 7.3 A Simple Testbench 7.4 Physical Types 7.5 Single Process Testbench 7.6 Wait Statements 7.7 Assertion and Report Statements 7.8 Records and Table Lookup Testbenches 7.9 Testbenches That Compute Stimulus and Expected Results 7.10 Predefined Shift Operators 7.11 Stimulus Order Based on UUT Functionality 7.12 Comparing a UUT to a Behavioral Intent Model 7.13 Code Coverage and Branch Coverage 7.14 Post-Synthesis and Timing Verifications for Combinational Designs 7.15 Timing Models Using VITAL and SDF 8 Latches and Flip-flops 8.1 Sequential Systems and Their Memory Elements 8.2 D Latch 8.3 Detecting Clock Edges 8.4 D Flip-flops 8.5 Enabled (Gated) Flip-flop 8.6 Other Flip-flop Types 8.7 PLD Primitive Memory Elements 8.8 Timing Requirements and Synchronous Input Data 9 Multibit Latches, Registers, Counters, and Memory 9.1 Multibit Latches and Registers 9.2 Shift Registers 9.3 Shift Register Counters 9.4 Counters 9.5 Detecting Non-clock Signal Edges 9.6 Microprocessor Compatible Pulse Width Modulated Signal Generator 9.7 Memories 10 Finite State Machines 10.1 Finite State Machines 10.2 FSM State Diagrams 10.3 Three Process FSM VHDL Template 10.4 State Diagram Development 10.5 Decoder for an Optical Shaft Encoder 10.6 State Encoding and State Assignment 10.7 Supposedly Safe FSMs 10.8 Inhibit Logic FSM Example 10.9 Counters as Moore FSMs 11 ASM Charts and RTL Design 11.1 Algorithmic State Machine Charts 11.2 Converting ASM Charts to VHDL 11.3 System Architecture 11.4 Successive Approximation Register Design Example 11.5 Sequential Multiplier Design 12 Subprograms 12.1 Subprograms 12.2 Functions 12.3 Procedures 12.4 Array Attributes and Unconstrained Arrays 12.5 Overloading Subprograms and Operators 12.6 Type Conversions 13 Packages 13.1 Packages and Package Bodies 13.2 Standard and De Facto Standard Packages 13.3 Package STD_LOGIC_1164 13.4 Package NUMERIC_STD (IEEE Std 1076.3) 13.5 Package STD_LOGIC_ARITH 13.6 Packages for VHDL Text Output 14 Testbenches for Sequential Systems 14.1 Simple Sequential Testbenches 14.2 Generating a System Clock 14.3 Generating the System Reset 14.4 Synchronizing Stimulus Generation and Monitoring 14.5 Testbench for Successive Approximation Register 14.6 Determining a Testbench Stimulus for a Sequential System 14.7 Using Procedures for Stimulus Generation 14.8 Output Verification in Stimulus Procedures 14.9 Bus Functional Models 14.10 Response Monitors 15 Modular Design and Hierarchy 15.1 Modular Design, Partitioning, and Hierarchy 15.2 Design Units and Library Units 15.3 Design Libraries 15.4 Using Library Units 15.5 Direct Design Entity Instantiation 15.6 Components and Indirect Design Entity Instantiation 15.7 Configuration Declarations 15.8 Component Connections 15.9 Parameterized Design Entities 15.10 Library of Parameterized Modules (LPM) 15.11 Generate Statement 16 More Design Examples 16.1 Microprocessor-Compatible Quadrature Decoder/Counter Design 16.2 Verification of Quadrature Decoder/Counter 16.3 Parameterized Quadrature Decoder/Counter 16.4 Electronic Safe Design 16.5 Verification of Electronic Safe 16.6 Encoder for RF Transmitter Design Appendix VHDL Attribute Bibliography Index

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Code-barres	Cote	Support	Localisation	Section	Disponibilité	N.Inventaire
1693	24-03-19	Livre	Bibliothèque de Génie Electrique- USTO	Documentaires	Exclu du prêt	1693