| Titre : | Computer architecture : pipelined and parallel processor design | | Type de document : | texte imprimé | | Auteurs : | Michael J. Flynn, Auteur | | Editeur : | Boston : Jones and Bartlett Publishers | | Année de publication : | 1995 | | Importance : | 788 p. | | Présentation : | couv. ill. en coul., ill. | | Format : | 26 cm. | | ISBN/ISSN/EAN : | 978-0-86720-204-5 | | Langues : | Anglais (eng) | | Catégories : | INFORMATIQUE
| | Index. décimale : | 08-04 Architecture et théorie des ordinateurs | | Résumé : | Computer Architecture: Pipeline and Parallel Processor Design was designed for a graduate level course on computer architecture and organization. The book's content, especially the last half of the book, represents the most advanced material that a typical graduate student studies before directly encountering the design process. The text avoids extensive compendiums of current features of various processors or technologies, just as it stresses concepts that underlie these processor designs. It abstracts the essential elements of processor design and emphasizes a design methodology including: design concepts, design target data, and evaluation tools, especially those using basic probability theory and simple queuing theory. | | Note de contenu : | Contents
1. Architecture and machines
2. Time, Area, and Instruction Sets
3. Data: How Programs Behave
4. Pipelined Processor Design
5. Cache Memory
6. Memory System Design
7. Concurrent Processors
8. Shared Memory Multiprocessors
9. I/O and the Storage Hierarchy
10. Processor Studies
Appendix A. DTMR Cache Miss Rates
Appendix B. SPECmark vs. DTMR Cache Performance
Appendix C. Modeling System Effects in Caches
Appendix D. New DRAM Technologies
Appendix E. M/G/1 Queues
Appendix F. Some Details on Bus-Based Protocols; Bibliography
-Index |
Computer architecture : pipelined and parallel processor design [texte imprimé] / Michael J. Flynn, Auteur . - Boston : Jones and Bartlett Publishers, 1995 . - 788 p. : couv. ill. en coul., ill. ; 26 cm. ISBN : 978-0-86720-204-5 Langues : Anglais ( eng) | Catégories : | INFORMATIQUE
| | Index. décimale : | 08-04 Architecture et théorie des ordinateurs | | Résumé : | Computer Architecture: Pipeline and Parallel Processor Design was designed for a graduate level course on computer architecture and organization. The book's content, especially the last half of the book, represents the most advanced material that a typical graduate student studies before directly encountering the design process. The text avoids extensive compendiums of current features of various processors or technologies, just as it stresses concepts that underlie these processor designs. It abstracts the essential elements of processor design and emphasizes a design methodology including: design concepts, design target data, and evaluation tools, especially those using basic probability theory and simple queuing theory. | | Note de contenu : | Contents
1. Architecture and machines
2. Time, Area, and Instruction Sets
3. Data: How Programs Behave
4. Pipelined Processor Design
5. Cache Memory
6. Memory System Design
7. Concurrent Processors
8. Shared Memory Multiprocessors
9. I/O and the Storage Hierarchy
10. Processor Studies
Appendix A. DTMR Cache Miss Rates
Appendix B. SPECmark vs. DTMR Cache Performance
Appendix C. Modeling System Effects in Caches
Appendix D. New DRAM Technologies
Appendix E. M/G/1 Queues
Appendix F. Some Details on Bus-Based Protocols; Bibliography
-Index |
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